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FEDL64167E-02 Semiconductor
FEDL64167E-02 This version: Dec. 1999 MSM64167E Previous version: Jul. 1999
Semiconductor MSM64167E
GENERAL DESCRIPTION
4-Bit Microcontroller with Built-in Dual-Slope Type A/D Converter and LCD Driver
The MSM64167E is a low power 4-bit microcontroller that employs Oki's original CPU core nX4/20. The MSM64167E contains a dual-slope type A/D converter with a 4-channel input, LCD driver for up to 108 segments, and buzzer output port. The MSM64167E is best suited for applications such as low power, high precision thermometers, barometers, and hygrometers.
FEATURES
* Operating range Operating frequencies Operating voltage Operating temperature * Memory space Internal program memory Internal data memory * Minimum instruction execution time * Dual-slope type A/D converter * LCD driver (1) At 1/4 duty and 1/3 bias (2) At 1/3 duty and 1/3 bias (3) At 1/2 duty and 1/2 bias * Buzzer driver * Timer Auto-reload mode Capture mode Clock frequency measuring mode * Watchdog timer * Clock CPU clock Time base clock * Power supply voltage * I/O port Input-output port Output port : : : : : : : : : : : : : 32.768 kHz, 700 kHz 2.6 to 3.6 V -40 to +85C 4064 bytes 256 nibbles 4.3 ms @ 700 kHz 91.6 ms @ 32.768 kHz 4-channel input 31 outputs; duty ratio switchable by software 108 segments (max) 84 segments (max) 58 segments (max) 1 output (4 output modes selectable) 16-bit 1
: : : : : :
32.768 kHz crystal oscillator and 700 kHz RC oscillator (with an external resistor) 32.768 kHz/700 kHz (switchable by software) 32.768 kHz 3V 3 ports 4 bits 2 ports 4 bits (8 out of the 31 LCD driver outputs can be used as output-only ports by mask option.) Synchronous/asynchronous mode support 32.768 kHz/external clock 9600 bps/4800 bps/2400 bps/1200 bps
* Serial port Synchronous mode Asynchronous mode
: : :
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FEDL64167E-02 Semiconductor MSM64167E
* Interrupt sources External interrupt : 2 sources Internal interrupt : 8 sources * Package: 80-pin plastic QFP (QFP80-P-1420-0.80-BK) : (Product name : MSM64167E-GA) 80-pin plastic TQFP (TQFP80-P-1212-0.50-K) : (Product name : MSM64167E-TB) Chip : (Product name : MSM64167E-) indicates a code number.
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FEDL64167E-02 Semiconductor MSM64167E
BLOCK DIAGRAM
CPU CORE: nX-4/20
BSR
TR2
TR0 (4) PCM PCL
TR1 PCH A11 to A8 A7 to A0 ROM 4064B
HALT
C
ALU
MIEF
B
A
(4)
(4)
H
L
X DB7 to DB0
Y (8) RAM 256N
IR DECODER
OSC2 OSC1 XT XT RESET
2CLK
TBC
IR
TIMING CONTROLLER
SP
ROMR (8)
INTC INT VSS P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
RSTG WDT
PORT2 INT VSS
TST1 TST2 VSSL L0 L1
TST
3
INT
INT SIOP 2 INT
PORT1 VR INT VSS
LCD TM L30 VSS VSS1 VSS2 VSS3 C1 C2 VDD VSS BD
PORT0
BIAS INT PORT ADDRESS DB7 to DB0
VSS VSSA OPP1 OPN1 OPO1 OPP0 OPN0 OPO0 VOF
ADC
VDDA VrA AIN0 AIN1 AIN2 AIN3 RA Rl CZ1 Cl CZ2 VG RCM
BD
3/31
Semiconductor
PIN CONFIGURATION (TOP VIEW)
MSM64167E-xxxGA
,
76 P2.1/RXC 77 P2.2/TXD 75 P2.0/TXC 78 P2.3 74 P1.3 73 P1.2 72 P1.1 71 P1.0 80 L1 79 L0
FEDL64167E-02 MSM64167E
68 P0.1/RXD
66 VSS 65 VSSA
64 OPP1 63 OPN1 62 OPO1 61 OPP0 60 OPN0 59 OPO0 58 VG 57 CZ2 56 CI 55 CZ1 54 RCM 53 RI 52 RA 51 AIN3 50 AIN2 49 AIN1 48 AIN0 47 VrA 46 VDDA 45 VOF 44 VSSL 43 RESET 42 TST2 41 TST1
70 P0.3
69 P0.2 36
L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25
1
2 3 4 5 6 7 8 9
10 11 12 13 14 15 17 18 19 20 21 22 23 24
16
L26 25
26
27
28
29
30
31
32
33
34
35
37
38
67 P0.0
39
L27 L28 L29 L30 OSC2 OSC1 VDD XT XT VSS2 C2 C1 VSS3 VSS1 BD
(QFP80-P-1420-0.80-BK) 80-Pin Plastic QFP
40
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FEDL64167E-02 Semiconductor MSM64167E
PIN CONFIGURATION (TOP VIEW) (continued)
MSM64167E-xxxTB
L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23
,
75 P2.2/TXD 76 P2.3 80 L3 78 L1 77 L0 79 L2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 17 18 19 20 16
66 P0.1/RXD
74 P2.1/RXC
73 P2.0/TXC
61 OPN1
60 OPO1 59 OPP0 58 OPN0 57 OPO0 56 VG 55 CZ2 54 CI 53 CZ1 52 RCM 51 RI 50 RA 49 AIN3 48 AIN2 47 AIN1 46 AIN0 45 VrA 44 VDDA 43 VOF 42 VSSL 41 RESET
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
62 OPP1
72 P1.3
71 P1.2
70 P1.1
69 P1.0
68 P0.3
67 P0.2
65 P0.0
64 VSS 63 VSSA
L24 L25 L26 L27 L28
(TQFP80-P-1212-0.50-K) 80-Pin Plastic TQFP
L29 L30 OSC2 OSC1 VDD XT XT VSS2 C2 C1 VSS3 VSS1 BD TST1 TST2
40
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FEDL64167E-02 Semiconductor MSM64167E
PAD CONFIGURATION
Pad Layout
80 1 Y 65 64
X
23 24 41
42
Chip Size Chip Thickness Coordinate Origin Pad Hole Size Pad Size Minimum Pad Pitch
: 5.95 mm 4.62 mm : 350 mm (typ.) : Chip center : 110 mm 110 mm : 130 mm 130 mm : 180 mm
Note: The chip substrate voltage is VDD.
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FEDL64167E-02 Semiconductor Pad Coordinates
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Pad Name L2/P3.2 L3/P3.3 L4/P4.0 L5/P4.1 L6/P4.2 L7/P4.3 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25 L26 L27 L28 L29 L30 OSC2 OSC1 VDD XT XT VSS2 C2 C1 VSS3 VSS1 BD X (m) -2593 -2304 -1842 -1626 -1430 -1234 -1038 -856 -664 -468 -272 -76 143 367 591 874 1056 1280 1504 1728 1952 2176 2624 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 2766 Y (m) -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -2155 -1862 -1638 -1414 -1190 -966 -742 -518 -336 -132 154 378 602 826 1050 1232 1456 1694 Pad No. 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Pad Name TST1 TST2 RESET VSSL VOF VDDA VrA AIN0 AIN1 AIN2 AIN3 RA RI RCM CZ1 CI CZ2 VG OPO0 OPN0 OPP0 OPO1 OPN1 OPP1 VSSA VSS P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 L0/P3.0 L1/P3.1 X (m) 2766 2660 2394 2211 1899 1598 1294 991 688 506 324 142 -40 -222 -402 -586 -768 -1016 -1246 -1498 -1749 -2001 -2253 -2625 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 -2766 Y (m) 1946 2155 2155 2155 2113 2113 2113 2113 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 2155 1960 1708 1456 1204 952 700 448 196 -56 -308 -560 -812 -1064 -1316 -1568 -1834
MSM64167E
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FEDL64167E-02 Semiconductor MSM64167E
PIN DESCRIPTIONS
Basic Functions
Function Symbol VDD VSS1 VSS2 VSS3 VSS Power Supply C1 C2 VSSL VSSA VDDA XT Oscillation XT OSC1 OSC2 Test TST1 TST2 Pin GA TB 32 39 35 38 66 37 36 44 65 46 34 33 31 30 41 42 30 37 33 36 64 35 34 42 63 44 32 31 29 28 39 40 Pad 32 39 35 38 66 37 36 44 65 46 34 33 31 30 41 42 Type -- -- -- -- -- -- -- -- -- -- I O I O I I Negative power supply for internal logic (An internally generated constant voltage is present at this pin.) Negative power supply for A/D converter: Externally connects to VSS2. 0 V power supply for A/D converter: Externally connects to VDD. Low-speed clock oscillation input and output pins: Connect to a crystal (32.768 kHz). High-speed clock oscillation input and output pins: Connect to an oscillation resistor (ROS). Input pins for testing. These pins are internally pulled up to VDD. System reset input pin. Setting this pin to "L" level puts this device into a reset state. Reset RESET 43 41 43 I Then, setting this pin to "H" level starts executing an instruction from address 000H. This pin is internally pulled up to VDD. 0 V power supply. Bias output for driving LCD (-1.5 V). Negative power supply Bias output for driving LCD (-3.0 V). Bias output for driving LCD (-4.5 V). Negative power supply for I/O port interface. Pins for connecting a capacitor for generating LCD driving bias Description
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FEDL64167E-02 Semiconductor MSM64167E
Basic Functions (continued)
Pin GA TB 67 68 69 70 71 72 73 74 75 76 77 78 40 48 49 50 51 52 53 54 55 56 57 58 47 45 61 64 60 63 59 62 65 66 67 68 69 70 71 72 73 74 75 76 38 46 47 48 49 50 51 52 53 54 55 56 45 43 59 62 58 61 57 60
Function Symbol P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 Ports P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 Buzzer BD AIN0 AIN1 AIN2 AIN3 RA RI RCM CZ1 CI A/D Converter CZ2 VG VrA VOF OPP0 OPP1 OPN0 OPN1 OPO0 OPO1
Pad 67 68 69 70 71 72 73 74 75 76 77 78 40 48 49 50 51 52 53 54 55 56 57 58 47 45 61 64 60 63 59 62
Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I/O I/O I/O I/O -- -- -- -- -- -- -- -- I I I I I O O
Description 4-bit input-output port (P0): Following can be specified for each bit by the port 0 control registers 0 to 3 (P00CON to P03CON): (1) input or output, (2) pull-up/pull-down resistor input or high impedance input, and (3) NMOS open drain output or CMOS output. 4-bit input-output port (P1): Following can be specified for each bit by the port 1 control registers 0 to 3 (P10CON to P13CON): (1) input or output, (2) pull-up/pull-down resistor input or high impedance input, and (3) NMOS open drain output or CMOS output. 4-bit input-output port (P2): Following can be specified for each bit by the port 2 control registers 0 to 3 (P20CON to P23CON): (1) input or output, (2) pull-up/pull-down resistor input or high impedance input, and (3) NMOS open drain output or CMOS output. Output pin for the buzzer driver Analog voltage input pins. Each of these pins can be switched to provide a constant current output by AD control register 0 (ADCON0). Current-adjusting resistor connection pin. Pin for connecting resistor for integration. Common connection pin for resistor for integration, capacitor 1 for offset compensation, and capacitor for integration. Pin for connecting capacitor 1 for offset compensation. Pin for connecting capacitor for integration. Pins for connecting capacitor 2 for offset compensation. Reference voltage for A/D conversion (internally generated constant voltage). Pin for connecting resistor for voltage amplification circuit offset adjustment. Analog micro-voltage input pins. Pins for connecting resistor for voltage amplification factor adjustment.
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FEDL64167E-02 Semiconductor MSM64167E
Basic Functions (continued)
Pin GA TB 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 77 78 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
Function Symbol L0/P3.0 L1/P3.1 L2/P3.2 L3/P3.3 L4/P4.0 L5/P4.1 L6/P4.2 L7/P4.3 L8 L9 L10 L11 L12 L13 LCD Drivers L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25 L26 L27 L28 L29 L30
Pad 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
Type O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O
Description LCD segment and common signals output pins. Functions as output ports by mask option.
LCD segment and common signals output pins.
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FEDL64167E-02 Semiconductor Secondary Functions
Pin GA TB 67 68 69 70 71 72 73 74 75 76 77 78 68 75 76 77 67 69 78 65 66 67 68 69 70 71 72 73 74 75 76 66 73 74 75 65 67 76
MSM64167E
Function Symbol P0.0 P0.1 P0.2 P0.3 P1.0 External Interrupts P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 P0.1 Serial Port P2.0 P2.1 P2.2 P0.0 Timer P0.2 P2.3
Pad 67 68 69 70 71 72 73 74 75 76 77 78 68 75 76 77 67 69 78
Type
Description Level-triggered external interrupt input pins. The change of input signal level causes an interrupt to occur.
I
I I/O I/O O I I O
Receive data input pin (RXD) of serial port. Transmit clock input-output pin (TXC) of serial port. Receive clock output pin (RXC) of serial port. Transmit data output pin (TXD) of serial port. Capture trigger input pin of timer. External clock input pin (TMC) of timer. Timer overflow flag output pin (TMO) of timer.
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FEDL64167E-02 Semiconductor MSM64167E
MEMORY MAPS
Program Memory
Test program area 0FFFH 0FE0H 0FDFH
,,,,,,,,,,,,, ,,,,,,,,,,,,, ,,,,,,,,,,,,, ,,,,,,,,,,,,, ,,,,,,,,,,,,,
32 bytes
03BH 4064 bytes 038H 035H 032H 02FH 02CH 03EH Interrupt area 020H CZP area 029H 026H 023H 020H
Watchdog interrupt External interrupt (0) Serial port receive interrupt Serial port transmit interrupt External interrupt (1) Timer interrupt ADC interrupt 32 Hz interrupt 16 Hz interrupt 1 Hz interrupt
010H
Start address 000H 8 bits
Program Memory Map Address 000H is the instruction execution start address by the system reset. The CZP area from address 010H to address 01FH is the start address for the CZP subroutine of 1-byte call instruction. The start address of interrupt subroutine is assigned to the interrupt address from address 020H to 03DH. The user area has 4064 bytes of address 000H to address 0FDFH. No program can be stored in the test program area.
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FEDL64167E-02 Semiconductor MSM64167E
Data Memory The data memory area consists of 8 banks and each bank has 256 nibbles (256 4 bits). The data RAM is assigned to BANK 7 and peripheral ports are assigned to BANK 0.
7FFH 780H 700H 6FFH BANK7 Data RAM area (256 nibbles)
Data/Stack area (128 nibbles)
Contents of 000H to 07FH Inaccessible area 07FH
SFR area
100H 0FFH 080H 07FH 000H 4 bits Unused area BANK 0 000H
Data Memory Map Half the data RAM area (128 nibbles) is shared by the stack area. The stack is a memory starting from address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine Call Instruction and 8 nibbles are used by an interrupt. The addresses 080H to 0FFH of BANK 0 are not assigned as the data memory, so access to these addresses has no effect. Moreover, it is impossible to access BANK 1 to BANK 6.
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FEDL64167E-02 Semiconductor MSM64167E
ABSOLUTE MAXIMUM RATINGS
(VDD = VDDA = 0 V) Parameter Power Supply Voltage 1 Power Supply Voltage 2 Power Supply Voltage 3 Power Supply Voltage 4 Power Supply Voltage 5 Power Supply Voltage 6 Input Voltage 1 Input Voltage 2 Input Voltage 3 Input Voltage 4 Output Voltage 1 Output Voltage 2 Output Voltage 3 Output Voltage 4 Storage Temperature Symbol VSS1 VSS2 VSS3 VSSL VSS VSSA VIN1 VIN2 VIN3 VIN4 VOUT1 VOUT2 VOUT3 VOUT4 TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VSS2 Input, Ta = 25C VSS Input, Ta = 25C VSS1 Input, Ta = 25C VSSA Input, Ta = 25C VSS2 Output, Ta = 25C VSS3 Output, Ta = 25C VSS Output, Ta = 25C VSS1 Output, Ta = 25C -- Rating -2.0 to +0.3 -4.0 to +0.3 -5.5 to +0.3 -4.0 to +0.3 -5.5 to +0.3 -4.0 to +0.3 VSS2 - 0.3 to +0.3 VSS - 0.3 to +0.3 VSS1 - 0.3 to +0.3 VSSA - 0.3 to +0.3 VSS2 - 0.3 to +0.3 VSS3 - 0.3 to +0.3 VSS - 0.3 to +0.3 VSS1 - 0.3 to +0.3 -55 to +125 Unit V V V V V V V V V V V V V V C
RECOMMENDED OPERATING CONDITIONS
(VDD = VDDA = 0 V) Parameter Operating Temperature Operating Voltage External 700 kHz RC Oscillator Resistance Crystal Oscillation Frequency Symbol Top VSS2 VSSA VSS ROS fXT Condition -- VSS2 = VSSA -- -- -- Range -40 to +85 -3.6 to -2.6 -5.25 to (0.8*VSS2, -2.6 max.)* 90 to 300 30 to 66 Unit C V V kW kHz
*
Indicates that the value of VSS is 80% of VSS2 and should not exceed -2.6 V.
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FEDL64167E-02 Semiconductor MSM64167E
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = VDDA = 0 V, VSS2 = VSS = -3.0 V, Ta = -40 to +85C unless otherwise specified) Condition +100% -50% +100% -50% Min. Typ. Max. Unit
Measuring Circuit
Parameter
Symbol
VSS1 Voltage VSS3 Voltage VSSL Voltage Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detection Time Internal Crystal Oscillator Capacitance External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance Internal 700k RC Oscillator Capacitance 700k RC Oscillation Frequency POR Generation Voltage POR Non-generation Voltage
VSS1 VSS3 VSSL VSTA VHOLD TSTOP CG CGEX CD COS fOSC VPOR1 VPOR2
Ca, Cb, C12 = 0.1 mF Ca, Cb, C12 = 0.1 mF -- Oscillation start time: within 5 seconds -- -- -- When external CG used -- --
-1.7 -4.7 -2.1 -- -- 0.1 10 10 10 8.0 520 -0.7 -3.0
-1.5 -4.5 -1.5 -- -- -- 15 -- 15 12 700 -- --
-1.3 -4.3 -0.6 -2.6 -2.6 1000 20 30 20 16 910 0 -2.0
V V V V V ms pF pF pF pF kHz V V
1
External resistor ROS = 100 kW VSS2 = -2.6 to -3.6 V When VSS2 is between VPOR1 and -3.0 V No POR when VSS2 is between VPOR2 and -3.0 V
Notes: 1. "POR" denotes Power On Reset. 2. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs.
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FEDL64167E-02 Semiconductor DC Characteristics (continued)
(VDD = VDDA = 0 V, VSS2 = VSS = -3.0 V, Ta = -40 to +85C unless otherwise specified) Parameter
Symbol
MSM64167E
Condition CPU in halt state (700k RC oscillation halt) CPU in operating state (700k RC oscillation halt) CPU in operating state (700k RC oscillation in operation) CPU in halt state (700k RC oscillation halt), A/D converter in operating state
Min.
Typ.
Max.
Unit
Measuring Circuit
Supply Current 1 Supply Current 2 Supply Current 3
IDD1 IDD2 IDD3
-- -- -- -- --
1.2 5.0 400 200 400
4.5 15 800 300 600
mA mA
1
mA mA mA
Supply Current 4
IDD4
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FEDL64167E-02 Semiconductor DC Characteristics (continued)
(VDD = VDDA = 0 V, VSS1 = VSSL = -1.5 V, VSS2 = VSS = VSSA = -3.0 V, VSS3 = -4.5 V, Ta = -40 to +85C unless otherwise specified) Parameter (Pin Name) Output Current 1 (P0.0 to P0.3) (P1.1 to P1.3) (P2.0 to P2.3)
Symbol
MSM64167E
Condition VOH1 = -0.5 V VOL1 = VSS + 0.5 V VSS = -5 V, VOH1S = -0.5 V VSS = -5 V, VOL1S = VSS + 0.5 V VOH2 = -0.7 V VOL2 = VSS2 + 0.7 V VOH3 = -0.5 V VOL3 = VSS + 0.5 V VOH4 = -0.5 V VOL4 = VSS + 0.5 V VSS = -5 V, VOH4S = -0.5 V VSS = -5 V, VOL4S = VSS + 0.5 V VOH5 = -0.5 V VOL5 = VSS2 + 0.5 V VOH6 = -0.2 V (VDD level)
Min.
Typ.
Max.
Unit mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA
Measuring Circuit
IOH1 IOL1 IOH1S IOL1S
-6.0 0.7 -9.0 1.0 -6.0 0.7 -3.0 15 -1.5 0.15 -2.0 0.2 -6.0 0.7 -- 4.0 -- 4.0 -- 4.0 -- -0.3
-2.0 2.0 -3.0 3.0 -2.0 2.0 -1.2 3.0 -0.6 0.6 -0.7 0.7 -2.0 2.0 -- -- -- -- -- -- -- --
-0.7 6.0 -1.0 9.0 -0.7 6.0 -0.2 100 -0.15 1.5 -0.2 2.0 -0.7 6.0 -4.0 -- -4.0 -- -4.0 -- 0.3 --
Output Current 2 (BD) Output Current 3 (RI, CI, OPO0, OPO1) Output Current 4 (When L0 to L7 are configured as output ports)
IOH2 IOL2 IOH3 IOL3 IOH4 IOL4 IOH4S IOL4S
2
Output Current 5 (OSC2)
IOH5 IOL5 IOH6 IOMH6
VOMH6 = VSS1 + 0.2 V (VSS1 level) VOMH6S = VSS1 - 0.2 V (VSS1 level) VOML6 = VSS2 + 0.2 V (VSS2 level) VOML6S = VSS2 - 0.2 V (VSS2 level) VOL6 = VSS3 + 0.2 V VOH = VDD VOL = VSS2 (VSS3 level)
Output Current 6 (L0 to L30)
IOMH6S IOML6 IOML6S IOL6
Output Leakage Current (P0.0 to P0.3) (P1.0 to P1.3) (P2.0 to P2.3)
IOOH IOOL
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FEDL64167E-02 Semiconductor DC Characteristics (continued)
(VDD = VDDA = 0 V, VSS1 = VSSL = -1.5 V, VSS2 = VSS = VSSA = -3.0 V, VSS3 = -4.5 V, Ta = -40 to +85C unless otherwise specified) Parameter (Pin Name)
Symbol
MSM64167E
Condition VIH1 = VDD (when pulled down) VIL1 = VSS (when pulled up)
VIH1 = VDD, VSS = -5 V (when pulled down)
Min. 30 -300 80
Typ. 90 -90 250 -250 -- -- -90 -- -- -250 1.0 -110 -- -- -- -1.5 -- -- -- -- -- -- -- --
Max. 300 -30 800 -80 1.0 0 -30 1.0 0 -125 -- -10 1.0 0 1.0 -0.75 1.0 0 0 -2.4 0 -4.0 0 -2.4
Unit mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA V V V V V V
Measuring Circuit
IIH1 Input Current 1 (P0.0 to P0.3) (P1.0 to P1.3) (P2.0 to P2.3) IIL1 IIH1S IIL1S IIH1Z IIL1Z Input Current 2 (OPP0, OPP1, OPN0, OPN1, VOF) IIL2 IIH2Z IIL2Z Input Current 3 (VrA) IIL3 IIH3 IIL4 Input Current 4 (OSC1) IIH4Z IIL4Z Input Current 5 (RESET, TST1, TST2) Input Current 6 (RCM, CZ1, CZ2, AIN0 to AIN3, RA) Input Voltage 1 (P0.0 to P0.3) (P1.0 to P1.3) (P2.0 to P2.3) (OSC1) Input Voltage 2 (OSC1, RESET, TST1, TST2) IIH5 IIL5 IIH6Z IIL6Z VIH1 VIL1 VIH1S VIL1S VIH2 VIL2
VIL1 = VSS = -5 V (when pulled up) -800 VIH1 = VDD (in a high impedance state) 0
VIL1 = VSSA (in a high impedance state) -1.0 VIL2 = VSSA (when pulled up) VIH2 = VDD (in a high impedance state) VIL2 = VSSA (in a high impedance state) VIL3 = VSSA (ENADC = 0) VIH3 = VrA + 30 mV (ENADC = 1) VIL4 = VSS2 (when pulled up) VIH4 = VDD (in a high impedance state) VIL4 = VSS2 (in a high impedance state) VIH5 = VDD VIL5 = VSS2 VIH6 = VDD (in a high impedance state) VIL6 = VSSA (in a high impedance state) -- -- VSS = -5 V VSS = -5 V -- -- -300 0 -1.0 -375 0.6 -300 0 -1.0 0 -3.0 0 -1.0 -0.6 -3.0 -1.0 -5.0 -0.6 -3.0
3
4
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FEDL64167E-02 Semiconductor DC Characteristics (continued)
(VDD = VDDA = 0 V, VSS1 = VSSL = -1.5 V, VSS2 = VSS = VSSA = -3.0 V, VSS3 = -4.5 V, Ta = -40 to +85C unless otherwise specified) Parameter (Pin Name) Hysteresis Width (P0.0 to P0.3) (P1.0 to P1.3) (P2.0 to P2.3) Hysteresis Width (RESET, TST1, TST2) Input Pin Capacitance (P0.0 to P0.3) (P1.0 to P1.3) (P2.0 to P2.3)
Symbol
MSM64167E
Condition
Min.
Typ.
Max.
Unit
Measuring Circuit
DVT1 DVT1S DVT2 VSS = -5 V
--
0.2 0.25
0.5 1.0
1.0 1.5
V V 4
--
0.2
0.5
1.0
V
CIN
--
--
--
5.0
pF
1
19/31
FEDL64167E-02 Semiconductor AC Characteristics (Serial Interface, Serial Port) (VDD = 0V, VSS2 = -3.0 V, VSS = -5.0 V, Ta = -40 to +85C unless otherwise specified) (1) Synchronous Communication MSM64167E
Parameter TXC/RXC Input Fall Time TXC/RXC Input Rise Time TXC/RXC Input "L" Level Pulse Width TXC/RXC Input "H" Level Pulse Width TXC/RXC Input Cycle Time TXC/RXC Output Cycle Time TXD Output Delay Time RXD Input Setup Time RXD Input Hold Time
Symbol tf tr tCWL tCWH tCYC tCYC1(O) tDDR tDS tDH
Condition -- -- -- -- -- CPU operating at 32.768 kHz Output load capacitance 10 pF -- --
Min. -- -- 0.8 0.8 2.0 -- -- 0.5 0.8
Typ. -- -- -- -- -- 30.5 -- -- --
Max. 1.0 1.0 -- -- -- -- 0.4 -- --
Unit ms ms ms ms ms ms ms ms ms
Synchronous communication timing ("H" level = -1.0 V, "L" level = -4.0 V)
tCYC TXC (P2.0)/ RXC (P2.1) tr tCWH tDDR TXD (P2.2) tDS RXD (P0.1) tDH tDS 0V tDDR 0V tf tCWL 0V
20/31
FEDL64167E-02 Semiconductor (2) UART Communication MSM64167E
Parameter Transmit Baud Rate Receive Baud Rate
Symbol TBRT RBRT
Condition TBRT = 1/fBRT TCR = 1/fOSC RBRT = 1/fBRT
Min. TBRT-TCR RBRT0.97
Typ. TBRT RBRT
Max. TBRT+TCR RBRT1.03
Unit s s
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing ("H" level = -1.0 V, "L" level = -4.0 V)
TBRT TXD (P2.2) RBRT RXD (P0.1)
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FEDL64167E-02 Semiconductor A/D Converter Characteristics
(VDD = VDDA = 0 V, VSS2 = VSS = VSSA = -3 V, Ta = -40 to +85C, VrA = -1.2 V, at execution of 12-bit A/D conversion, unless otherwise specified) Parameter (Pin Name) Analog Input Voltage Range (AIN0 to AIN3) Analog Input Voltage Range (OPP0, OPP1) (VOF) Resolution Linearity Error Zero Scale Error Full Scale Error VrA Voltage (VrA) VrA Temperature Coefficient VG Voltage (VG) RA Voltage (RA) Symbol Condition Min. Typ. Max. Unit Measuring Circuit
MSM64167E
VAIN VOPP -- -- -- -- VrA -- VG VRA
-- -- -- -- -- -- Ta = 25C -- Ta = 25C Ta = 25C
-1.2 -1.6 -- -1 -2 -16 -8.0 -867 -440
-- -- -- -- -- -- -- -800 -400
-0.4 -0.4
V V
12 + S* bits +1 +2 +16 LSB LSB LSB mV mV mV 5
-1300 -1200 -1100 -733 -360
+2.0 mV/C
*
"S" indicates a sign bit.
Voltage Amplification Circuit Characteristics
(VDD = VDDA = 0 V, VSS2 = VSS = VSSA = -3 V, Ta = -40 to +85C unless otherwise specified) Parameter (Pin Name) Symbol Condition VOPP1-VOPP0 = 10 mV, Gain = 40 Amplifier Gain Error (*1) Eg (*2) Eg = EI = (VOPO1 - VOPO0)/(VOPP1 - VOPP0) Gain (VAIN3 - VVOF) (VOPO1 - VOPO0) -1 -1 -3.0 -1.5 0 % Min. Typ. Max. Unit Measuring Circuit
Level Shift Error (*1)
EI
-4
--
+4
% 5
OPP0 = OPP1 = VOF = -0.8 V, Amplifier Offset Voltage VoffA OPO0 = OPN0, OPO1 = OPN1, VoffA = VOPO1 - VOPO0 Level Shift Offset Voltage VoffL OPO0 = OPO1 = VOF = -0.8V, VoffL = VAIN3 - VVOF -30 -- +30 mV -20 -- +20 mV
*1 Errors caused by offset voltage are excluded. *2 Errors decrease in proportion to gain.
22/31
FEDL64167E-02 Semiconductor Measuring circuit 1
RS1 VDD AIN0 VrA RCM RI CZ1 CI RS0 RI CZ1 CI CN CZ2 VG XT OSC1 ROS OSC2 VSSL VDDA XT C1 C2 VDD VSSA VSS2 VSS1 VSS3 VSS Ca, Cb, C12, Cl ROS RI CI, CZ1, CZ2 RS1 RS0 CN : 0.1 mF : 100 kW : 750 kW : 0.1 mF : 100 kW : 10 kW : 1000 pF Crystal 32.768 kHz CZ2
MSM64167E
MSM64167E
C12
A Cl V
Ca V
Cb V
Measuring circuit 2
(*2)
(*1) VIL
INPUT
VIH
MSM64167E
VDDA VDD
VSS1 VSS2
VSS3
VSSL VSS VSSA
OUTPUT
A
23/31
FEDL64167E-02 Semiconductor Measuring circuit 3
(*3) A MSM64167E
MSM64167E
VDDA VDD VSS1
VSS2
VSS3 VSSL
VSS VSSA
Measuring circuit 4
INPUT
(*3) VIL
MSM64167E
VDDA VDD VSS1
VSS2
VSS3 VSSL
VSS VSSA
*1 Input logic circuit to determine the specified measuring conditions. *2 Measured at the specified output pins. *3 Measured at the specified input pins.
OUTPUT
VIH
OUTPUT
INPUT
Waveform Monitoring
24/31
FEDL64167E-02 Semiconductor MSM64167E
Measuring circuit 5
RA RV0F RS RI VDD AIN0 VOF VrA RA RCM OPO0 R0 Rg R1 OPN0 OPN1 OPO1 VSSL VDDA VDD VSSA VSS2 VSS1 VSS3 MSM64167E XT C1 C2 VSS Ca, Cb, C12, Cl RI CI, CZ1, CZ2 CN RA RVOF RS R0, R1 Rg : 0.1 mF : 750 kW : 0.1 mF : 1000 pF : 10 kW : 10 kW max : 10 kW max : 270 kW : 100 kW max C12 RI CZ1 CI CZ1 CI CN CZ2 VG XT Crystal 32.768 kHz CZ2
Cl
Ca
Cb
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FEDL64167E-02 Semiconductor MSM64167E
FUNCTIONAL DESCRIPTION
CPU Peripheral Functions * A/D converter (ADC) The MSM64167E has a 4-channel input dual-slope type A/D converter. In dual-slope A/D conversion, the relationship between integral voltage and time is given by: Vin/Vr = t1/t2 where, t1 = given time for which an analog input voltage is integrated Vr = reference voltage Vin = voltage resulted from charging for t1 t2 = time required to discharge the voltage, from Vr to Vin From the above equation, Vin is found. The range of Vin is -0.8 0.4 V. The A/D converter resolution time is programmable. The A/ D converter has a preamplifier for amplifying a microvoltage. It is suited to applications such as thermometers, pressure gauges, and hygrometers. * LCD driver (LCD) The MSM64167E has a built-in LCD driver for 31 outputs. The LCD driver consists of 31 4-bit display registers (DSPR0-30), the Display Control Register (DSPCON), a 31-output LCD driver circuit, and a bias generation circuit (BIAS). There are three types of driving methods: 1/4 duty, 1/3 duty and 1/2 duty. Software selects the duty mode. A mask option can select either a common driver or a segment driver for each LCD driver pin. A mask option can also specify assignment of each bit of the display register to each segment. All the display registers must be selected by a mask option. L0 to L7 of the LCD driver can be configured to be output ports by a mask option. The relationship between the duty, the bias method, and the maximum segment number follows: 1/4 duty 1/3 bias method ------- 108 segments 1/3 duty 1/3 bias method ------- 84 segments 1/2 duty 1/2 bias method ------- 58 segments * Port (P0, P1, P2) The MSM64167E has three input-output ports (P0, P1, P2) with 4 bits each. Each bit of the ports can be configured to be (1) an input or output, (2) pull-up/pull-down resistor input or high impedance input, and (3) NMOS open drain output or CMOS output. A change in the input level of each pin of P0 and P1 generates an external interrupt 0 request, and a change in the input level of each pin of P2 generates an external interrupt 1 request. The serial port function and the timer function are assigned as the secondary functions. * Buzzer driver (BD) The MSM64167E has a built-in buzzer driver with 2 buzzer output frequencies and 4 buzzer output modes. Each buzzer output is selected by the Buzzer Control Register (BDCON) and the Buzzer Frequency Control Register (BFCON). * Serial port (SIOP) The MSM64167E has a serial port (SIOP). The serial port is a synchronous/asynchronous selectable serial communication port. The transmit section and the receive section are independent of each other, which allows simultaneous operation of transmission and receiving.
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FEDL64167E-02 Semiconductor MSM64167E
* Watchdog timer (WDT) The MSM64167E has a built-in watchdog timer to detect CPU malfunction. The watchdog timer is composed of a 6-bit watchdog timer counter (WDTC) to count a 16 Hz output and a watchdog timer control register (WDTCON) to reset WDTC. * Timer (TM) The MSM64167E contains a 16-bit timer (TM). The timer has three operation modes: auto-reload mode, capture mode, and clock frequency measuring mode. It counts at 32.768 kHz or 700 kHz or by an external clock. The timer is used for pulse generation, time measurement, etc., and is also used as an A/D conversion counter at A/D conversion and as a baud rate generator at serial communication. * Clock generation circuit (2CLK) The MSM64167E has a clock generation circuit (2CLK) that generates clocks of two types: lowspeed and high-speed. The circuit consists of a 32.768 kHz crystal oscillation circuit, a 700 kHz RC oscillation circuit, and a clock control section. This circuit generates the system clock (CLK), crystal oscillation clock (32.768 kHz), and RC oscillation clock (700 kHz). The system clock is the basic operation clock of the CPU, and the crystal oscillation clock is the basic operation clock of the time-base counter and the buzzer driver. The crystal oscillation clock and RC oscillation clock are supplied to the timer to become a timer clock. The system clock frequency is switched between 32.768 kHz (output of the crystal oscillation circuit) and 700 kHz (output of the RC oscillation circuit) based on the contents of the frequency control register (FCON). Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of external resistor (ROS), operating voltage (VSS2), and ambient temperature (Ta). * Time base counter (TBC) The MSM64167E has a built-in time base counter (TBC) that generates clocks to be supplied to internal peripheral circuits. The time base counter is composed of 15 binary counters. The count clock of the time base is driven by the oscillation clock (32.768 kHz) of the crystal oscillation circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit, the timer, the watchdog timer, the time base interrupt, the sampling clocks of each port, and the LCD driver. * Interrupt (INTC) The MSM64167E has ten interrupt sources (10 vector addresses), of which two are external interrupts from ports and eight are internal interrupts. Of the ten interrupt sources, only the watchdog interrupt cannot be disabled (non-maskable interrupt). The other nine interrupts are controlled by the master interrupt enable flag (MI) and the interrupt enable registers (IE0, IE1, and IE2). When an interrupt condition is met, the CPU branches to a vector address corresponding to the interrupt source.
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Semiconductor
APPLICATION CIRCUITS
LCD
ROS
Crystal 32.768 kHz
CGEX
OSC2 OSC1 VDD XT XT RESET P1.0 P1.1 P1.2 P1.3 P0.0 P0.2 P0.3 P2.1
L30
L0 VDD C2 C1 VSS3 VSS2 VSS VSS1 VSSL TST2 TST1 BD
C2 C12 C3 CS 3V 5V
MSM64167E-xxx
C1 Cl
* With 5 V interface
VG CZ2 RI RCM CZ1 CI VSSA AIN2 AIN1 AIN0 VrA
VDDA
P2.0 P0.1
Switch matrix (4 4)
RI CI CZ1 CZ2 CN
* Temperature measurement by sensor
* Detects drop in voltage
FEDL64167E-02
* CGEX of crystal oscillator: External
MSM64167E
28/31
TxD Asynchronous serial communication RxD
FEDL64167E-02 Semiconductor MSM64167E
PACKAGE DIMENSIONS
(Unit : mm) QFP80-P-1420-0.80-BK
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.27 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
29/31
FEDL64167E-02 Semiconductor MSM64167E
(Unit : mm)
TQFP80-P-1212-0.50-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.40 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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FEDL64167E-02 Semiconductor MSM64167E
NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission.
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Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan
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